By Jeong-Taek Kong
Digital Timing Macromodeling for VLSI layout Verification firstly offers an in depth heritage of the advance of simulation concepts. It offers designated dialogue of some of the ideas applied in circuit, timing, fast-timing, switch-level timing, switch-level, and gate-level simulation. It additionally discusses mixed-mode simulation and interconnection research tools. The assessment in bankruptcy 2 offers an knowing of the benefits and negative aspects of the various concepts utilized in smooth electronic macromodels.
The booklet additionally offers a large choice of suggestions for acting nonlinear macromodeling of electronic MOS subcircuits which handle a huge variety of shortcomings in present electronic MOS macromodels. in particular, the options deal with the equipment version aspect, transistor coupling capacitance, powerful channel size modulation, sequence transistor relief, potent transconductance, enter terminal dependence, gate parasitic capacitance, the physique impression, the effect of parasitic RC-interconnects, and the impact of transmission gates. The concepts deal with significant resources of mistakes in present macromodeling recommendations, which needs to be addressed if macromodeling is to be accredited in advertisement CAD instruments by way of chip designers. The innovations awarded in Chapters 4-6 should be carried out in different macromodels, and are established utilizing the macromodel awarded in bankruptcy three. the recent strategies are proven over a really broad diversity of working stipulations: a lot wider than has been offered for earlier macromodels, therefore demonstrating the big variety of applicability of those strategies.
Read or Download Digital Timing Macromodeling for VLSI Design Verification (The Springer International Series in Engineering and Computer Science) PDF
Similar Cad books
All elements of chip cognizance for either electronic and analog circuits are lined. Electronics engineers are proven the right way to decide on acceptable technololgy and circuit structure, and plan the IC layout. they are going to achieve professional details on energy consaiderations, the benefits and drawbacks of every IC structure, and facets of layout for testability.
Up and operating with AutoCAD 2011 offers an creation to the basic suggestions of AutoCAD. The textual content strips away complexities, either actual and perceived, and decreases AutoCAD to easy-to-understand uncomplicated options. It teaches merely what's necessary to working AutoCAD first, thereby instantly development pupil self assurance.
Automation, creation structures, and Computer-Integrated production is acceptable for complex undergraduate/ graduate-level classes in Automation, construction structures, and Computer-Integrated production. The booklet must also be invaluable for training engineers and bosses who desire to know about automation and construction structures applied sciences in glossy production.
This publication addresses a way of quantitatively assessing useful verification growth. with no this strategy, layout and verification engineers, and their administration, are left guessing whether they have accomplished verifying the gadget they're designing. utilizing the thoughts defined during this ebook, they are going to the way to construct a toolset which permits them to understand how shut they're to sensible closure.
Extra info for Digital Timing Macromodeling for VLSI Design Verification (The Springer International Series in Engineering and Computer Science)